Semiconductor component manufacturers are constantly striving to increase the performance of their products while decreasing their cost of manufacture. As those skilled in the art are aware, discrete semiconductor devices and integrated semiconductor devices such as integrated circuits are fabricated from semiconductor wafers, which are then singulated or diced to produce semiconductor chips. The semiconductor wafers serve as the substrates from which semiconductor devices are manufactured and provide structural support during their manufacture. For adequate structural support, semiconductor wafers typically have a minimum thickness below which the wafers become warped and easily damaged, especially in a manufacturing environment. However, in many applications the thicker semiconductor wafers significantly degrade device performance. When device performance is an issue, semiconductor component manufacturers use thinned semiconductor wafers to take advantage of the performance benefits they give semiconductor devices even though thinning the semiconductor wafers increases the cost of manufacturing a semiconductor device. Techniques for manufacturing semiconductor components from thin semiconductor wafers include wafer bonding and the use of a rigid support system. Wafer bonding techniques greatly increase the cost of semiconductor components because they involve expensive materials, costly processing tools, and highly complex processing techniques that are limited to low temperatures. Like wafer bonding techniques, rigid tape support systems add to the cost of semiconductor components because they increase the processing complexity. Another limitation of rigid tape support systems is that semiconductor wafers become damaged during the separation of the rigid tapes from the semiconductor wafers.
Accordingly, it would be advantageous to have a method for thinning a semiconductor wafer so that it can be used to manufacture a semiconductor component. It would be of further advantage for the method to be cost efficient to implement.
For simplicity of illustration and ease of understanding, elements in the various figures are not necessarily drawn to scale, unless explicitly so stated. In some instances, well-known methods, procedures, components and circuits have not been described in detail so as not to obscure the present disclosure. The following detailed description is merely exemplary in nature and is not intended to limit the disclosure of this document and uses of the disclosed embodiments. Furthermore, there is no intention to be bound by any expressed or implied theory presented in the preceding text, including the title, technical field, background, or abstract.